Senior Analog/RF IC Layout Design Engineer with 10 years experience including 3+ years in mmWave SiGe or CMOS layout experience required for permanent role in Cork.


  • Take responsibility and ownership for the full silicon layout lifecycle including scheduling, floorplanning, verification and tapeout.
  • Take responsibility for Foundry interactions
  • Supervision of Contractors both on site and off site. 



  • A minimum of 10 years relevant experience, with 3+ yearsin mmWave SiGe or CMOS layout experience
  • Experience in use of Cadence 6
  • High level proficiency in interpretation of CALIBRE/ASSURA/PVS LVS, DRC, ERC
  • Extensive experience in full-custom IC Layout, specialising in Analog, Mixed-Signal, & RF IC projects
  • Expertise in standard layout practices such as layoutmatching, parasitics, noise & noise isolation, supply considerations, latchup, shielding substrates & wells.
  • Experience with advanced SiGe and RF CMOS technologies
  • Experience with ESD structures
  • Experience in layout of lumped and distributed passive structures such as coplanar waveguides, directional couplers, dividers/combiners, coupled lines, baluns, inductors and capacitors
  • Must understand quard rings, DNW, PN junctions
  • Experience with all aspects of chip finishing including top level checks and reticle planning
  • Excellent planning and organisational skills.
  • Good interpersonal and communications skills.
  • Ability to work well in a global team environment
  • Ability to work independently
  • Ability to work with the design team to minimize layout re-work by improving processes, checklists, documentation
  • Scripting skills in PERL or SKILL considered an advantage
  • PCELL creation experience considered an advantage
  • Experience in layout of following blocks is desirable: LNAs, mixer, pre mixer, buffer stages, VCO, PLLs, DACs, active filters, phase shifters.

Please contact Emer Moore to discuss in confidence


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