Principal Analog Design Engineer required by market-leading semiconductor multinational at their Dublin or Cork sites

Requirements:

• BEng, MEng or PhD
• Minimum of 7 years of experience in CMOS or high-speed I/O IC design and development
• Must have a thorough understanding of jitter and signal equalization techniques
• Proficient design experience in many of the following circuit blocks: Driver, Receiver, Serializer, Deserializer, Phase Interpolator, Low jitter PLL, High-Speed Clock Distribution, Bias and Bandgap, Voltage Regulators
• Excellent problem-solving skills, good communication skills and ability to work cooperatively in a team environment

Responsibilities:

• Design of High-Speed products at data rates up to and exceeding 112 Gbps on leading-edge technology nodes (e.g. 3nm FinFET CMOS)
• Design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications
• Work closely with Physical Design Engineers to design IC circuit blocks and PMA sections
• Participate in technical leadership of the team in the areas of circuit design and architectures
• Work with global teams (US, West Coast and east coast), which work in different time zones