Principal Digital Design Engineer required by Cork multinational to play a key part in designing and validating reference systems across advanced applications such as Machine Learning, Computer Vision, Automotive and Radar. As a Principal Design Engineer, you will lead SoC and subsystem-level integration for next-gen high-performance applications. Your mission will be to bring together compute, memory and interface IP to develop best-in-class reference platforms for customer delivery and internal product validation.

RESPONSIBILITIES:

• Designing and debugging SoC reference systems for a wide array of applications

• Integrating compute cores, memory subsystems, high-speed I/O and custom accelerators

• Validating IP functionality and performance in real-world implementations

• Supporting customer deployments and demos on FPGA/emulation platforms

• Identifying design flow enhancements and providing feedback to development teams

• Creating documentation, application notes and training materials

• Keeping up with the latest in EDA tools, verification methods and design trends

REQUIREMENTS:

• BS in EE/CS with 8+ years of experience, or MS in EE/CS with 4+ years of hands-on industry experience

• Minimum 3 years in ASIC design, SoC integration or verification

• Deep knowledge of processor systems, interconnects, high-speed interfaces or chiplet design

• Fluent in Verilog/SystemVerilog and RTL design best practices

• Skilled in timing closure, synthesis and verification flows

• Proficient with UVM methodology for functional verification

• Hands-on experience with Cadence and Synopsys EDA tools

• Strong background in FPGA emulation, hardware bring-up and debug workflows