Principal Verification Engineer
Job Description
Principal Verification Engineer required to join a dynamic and experienced team in Dublin or Cork to support the development of designs for the Automotive sector.
Requirements:
- Degree in Electronic or Computer Engineering.
- 10+ years of industry experience in digital verification.
- Development of verification environments and methodologies at block and subsystem level.
- Extensive knowledge of SystemVerilog / Verilog / OVM / UVM / VMM.
- Fluency in English.
Responsibilities:
- Verification of digital designs for CPUSubsystems, Communication Subsystems, Capacitive Sensing IP, Audio IP and Cryptographic IP.
- Be able to understand requirements & specifications.
- Focus on Test plan and test bench development.
- Responsible for IP verification (Formal, SystemVerilog, UVM).
- Support the Flow & Methodology improvements.