Senior ASIC Physical Design Engineer with significant hands-on experience in ASIC physical implementation and EDA tools required by semiconductor multinational in Dublin

Requirements:

  • Degree in Electrical or Computer Engineering, or Computer Science.
  • 7+ years of hands-on experience in ASIC physical implementation and EDA tools.
  • Solid engineering understanding of the underlying concepts of IC design, implementation flows and sign-off methodologies for deep submicron design.
  • Knowledge of industry-standard data file formats: Verilog, GDS, LEF, DEF, SDF, LIB, UPF, CPM, CMM.
  • Scripting and programming skills: TCL, Make, Unix Shell, Perl, Python.
  • Good written and verbal communication in English.

Responsibilities:

  • Develop a variety of advanced high-performance interface IPs, test chips and subsystem (e.g. DDR/HDMI/MIPI/USB etc.) at the latest 7nm/5nm/3nm process nodes.
  • Drive the complete digital implementation from RTL to GDS including Synthesis, Floor Planning, Power Analysis and Planning, CTS, Placement and Routing, STA, EMIR Signoff and Physical Verification.
  • Create physical design methodologies and automation scripts for various implementation steps by leveraging EDA ecosystem.
  • Ensure timely incoming and outgoing deliveries, report on project progress, interact and collaborate with multiple cross-functional teams and the product team
  • Provide technical support to customers when needed.

Please send your CV in confidence to emer@emtechrecruitment.ie 

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